- Microinstructions are stored in control memory in groups, with each group specifying a routine.
- To appreciate the address sequencing in microprogramme control unit, let us specify the steps that the control must undergo during the execution of a single computer instruction.
- An initial address is loaded into the control address register when power turned on in the computer.
- This address is usually the address of the first microinstruction that activates the instruction fetch routine.
- Moreover, The fetch routine may sequence by incrementing the control address register through the rest of its microinstructions.
- Also,, At the end of the fetch routine, the instruction is in the instruction register of the computer.
- The control memory next must go through the routine that determines the effective address of the operand.
- A machine instruction may have bits that specify various addressing modes, such as indirect address and index registers.
- Moreover, The effective address computation routine in control memory can reach through a branch microinstruction, which conditioned on the status of the mode bits of the instruction.
- Also, When the effective address computation routine is completed, the address of the operand is available in the memory address register.
- The next step is to generate the microoperations that execute the instruction fetched from memory.
- The microoperation steps to generated in processor registers depend on the operation code part of the instruction.
- Also, Each instruction has its own microprogram routine stored in a given location of the control memory.
- Moreover, The transformation from the instruction code bits to an address in control memory where the routine located referred to as a mapping
- A mapping procedure is a rule that transforms the instruction code into a control memory address.
- Once the required routine reached, the microinstructions that execute the instruction may sequence by incrementing the control address register.
- Micro-programs that employ subroutines will require an external register for storing the return address.
- Return addresses cannot store in ROM because the unit has no writing capability.
- Moreover, When the execution of the instruction completed, control must return to the fetch routine.
- This accomplished by executing an unconditional branch microinstruction to the first address of the fetch routine.
In summary, the address sequencing capabilities required in a control memory are:
- Incrementing of the control address register.
- Unconditional branch or a conditional branch, depending on status bit conditions.
- A mapping process from the bits of the instruction to an address for control memory.
- A facility for subroutine call and return.