ARM Architecture in detail
ARM Architecture is the important topic of the Microprocessor. It is the Important subject of the Computer Science & Technological field.
Logic Unit (ALU)
- The ALU has two 32-bits inputs.
- Also, The primary comes from the register file, whereas the other comes from the shifter.
- The ALU has a 4-bit function bus that permits up to 16 Opcode to be implemented.
Booth Multiplier Factor
- The multiplier factor has 3 32-bit inputs and the inputs return from the register file.
- Moreover, The multiplication starts whenever the beginning 04 input goes active. The fin of the output goes high when finishing.
- The barrel shifter features a 32-bit input to shifted.
- The encoder is used in the multiple load and store instruction to point which register within the register file to be loaded or kept
- For any microprocessor, the control unit is the heart of the whole process and it is responsible for the system operation, so the control unit design is the most important part of the whole design.
- The processor timing additionally included within the control unit.
- Signals from the control unit connected to each component within the processor to supervise its operation.
ARM7 TDMI Processor
- The ARM7TDMI core is a member of the ARM family of general-purpose 32-bit microprocessors.
- The ARM family offers high performance for very low-power consumption and gate count.
- Moreover, The ARM architecture is based on Reduced Instruction Set Computer (RISC) principles. The RISC instruction set and related decode mechanism much simpler than those of Complex Instruction Set Computer (CISC) designs.
- This simplicity gives:
- a high instruction throughput
- Moreover, an excellent real-time interrupt response
- Also, a small, cost-effective, processor macrocell.
The ARM7TDMI processor uses a pipeline to increase the speed of the flow of instructions to the processor. This enables several operations to take place simultaneously, and the processing, and memory systems to operate continuously.
A three-stage pipeline used, so instructions executed in three stages:
- Moreover, The ARM7TDMI processor has a Von Neumann architecture, with a single 32-bit data bus carrying both instructions and data. Only load, store, and swap instructions can access data from memory.
- Data can be 8-bit bytes, 16-bit half-words, or 32-bit words. Words must aligned to 4byte boundaries. Half-words must aligned to 2-byte boundaries.
- The ARM7TDMI processor has two instruction sets:
- The 32-bit ARM instruction set
- The 16-bit Thumb instruction set